AMD officially announced on Thursday that the Zen 3 processor will be officially released on October 8. According to foreign media reports, the whistleblower provided a detailed official Ryzen 4000 CPU document. The document lists various parameters of the AMD Ryzen 4000 series Vermeer processors.
AMD’s 4th generation Ryzen processors will support up to 1TB of ECC memory (512GB per channel), and will use a new shared 32MB L3 cache octa-core CCX to get an updated CCD design.
In addition, this generation of desktop processors still uses AM4 sockets, with up to 16 cores and 32 threads (two CCX / CCD modules). Although dual CCX/CCD modules are used, a single IOD module (I/O module) is still used for connection.
The CCX can run in single-threaded mode (1T) or dual-threaded mode (2T), so it can also have 16 cores and 16 threads.
In terms of cores, each Zen 3 core will be equipped with 512 KB of L2 cache, and each CCX / CCD will have a total of 4 MB of L2 cache and 32 MB of shared L3 cache. Due to the dual CCX/CCD design, equipped with two unified memory controllers (UMC), each controller supports one DRAM channel, single channel 512 GB or 1 TB ECC DRAM, supporting 1333MT/s to 3200MT/s (DDR4- 3200), support UDIMM, etc.